The invention relates to power transistor devices and methods of attaching power transistor devices to circuit boards.
A typical RF power transistor device includes one or more transistor dies attached to a metallic mounting flange. In addition to serving as a support structure, the mounting flange serves as a combined reference ground and heat sink. In particular, the flange acts as an immediate heat sink for the transistor die(s), which can generate significant amounts of heat. When installed, the mounting flange is attached to a metallic heat sink that is part of a circuit board assembly. Many different attachment techniques are known, e.g., solder bond, mechanical means such as screws or a retaining spring, or a thermally conductive adhesive. The mounting flange must provide adequate thermal transfer of heat from the die(s) to the larger heat sink, so it is important that the flange attachment process provide a solid thermal coupling.
When the mounting flange is attached by screws, one or more screw holes must be provided in both the mounting flange and the larger heat sink, requiring separate assembly steps by the manufacturer of the circuit boards using such RF power transistors. Further, the transistor devices have input and output lead frames attached to the sides of the mounting flanges, which typically require a hand soldering step separate from the normal reflow process. These extra steps in the manufacturing process increase manufacturing costs and potentially reduce manufacturing yield.
The current design of RF power transistor devices, as described above, is contrary to the direction in which the industry is moving. With manufacturing costs and reliability in mind, leaded and manually assembled components are being redesigned and made into surface mounted components. Despite these efforts, there has not been a significant breakthrough in producing a power transistor device package that meets the surface mount manufacturing needs of emerging technologies.
In accordance with one aspect, the invention provides for the implementation of power transistor packages as surface mounted circuit components, while still providing the ability to dissipate the significant heat generated by such transistors in high power, high frequency applications.
In one embodiment, a power transistor device package comprises a bottom substrate layer formed by pressure fitting a conductive flange integrated into a dielectric substrate material. A die having one or more transistors formed thereon is attached to the flange. Respective RF signal input and output contacts are located on the bottom substrate layer and electrically coupled to respective input and output terminals on the transistor die.
In one embodiment, the transistor package comprises additional dielectric layers, bonded to the bottom layer, in which the top layer forms a protective lid covering the transistor. Intermediate layers are cut-away where these layers overlap the transistor, thereby forming a cavity inside the package. Impedance matching networks may also be provided to couple the transistor input and output terminals to their respective contacts, the matching networks providing for input and output impedance tuning. These matching networks may comprise a plurality of components and conductors implemented the intermediate layers and/or the top layer.
Other aspects and features of the present invention will become apparent from consideration of the following description taken in conjunction with the accompanying drawings.